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AT&T DSP1 : ウィキペディア英語版
AT&T DSP1
The AT&T DSP1 was a pioneering digital signal processor (DSP) created by Bell Labs.
The DSP1 started in 1977 with a Bell Labs study that recommended creating a large-scale integrated circuit for digital signal processing. It described a basic DSP architecture with multiplier/accumulator, addressing unit, and control; the I/O, data, and control memories were planned to be off-chip until large-scale integration could make a single chip implementation feasible.
The DSP1 specification was completed in 1978, with first samples tested in May 1979. This first implementation was a single-chip DSP, containing all functional elements found in today's DSPs including multiplier–accumulator (MAC), parallel addressing unit, control, control memory, data memory, and I/O. It was designed with a 20-bit fixed point data format, and 16-bit coefficients and instructions, implemented in a 4.5 micrometre DRAM process technology.
By October 1979 other Bell Labs groups began development using the DSP1, most notably as a key component in AT&T's 5ESS switch.
==References==

* Stanzione et al., "Final Report Study Group on Digital Integrated Signal Processors," Bell Labs Internal Memorandum, October 1977.
* Boddie, Daryanani, Eldumtan, Gadenz, Thompson, Walters, Pedersen, "A Digital Signal Processor for Telecommunications Applications," ISSCC Digest of Technical Papers, February 1980, p. 44.
* Chapman, R. C. ed., "Digital Signal Processor," The Bell System Technical Journal, Special Edition, Vol. 60, No. 7, Part 2 (September 1981) pp. 1431–1701.
* (Computer History Museum description )
* ("The Legacy of DSP1", Electronic News, Nov 8, 1999 )

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
ウィキペディアで「AT&T DSP1」の詳細全文を読む



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